Registers

Register Map

EEVideo register allocation is flexible to support low-capability devices. One structure that simplifies implementation is to divide the register map into static (read-only, constant) and dynamic registers. This allows static registers to be served directly from compact ROM starting at address 0, with write requests to that space safely ignored.

Not all "read-only" registers are static. Some read-only registers change during normal operation. Mapping those dynamic read-only registers into ROM does not reduce complexity.

Read-Only Registers

Register 0 (Required)

EEVideo Management requires only one mandatory register. All others are optional.

Register 0 is a read-only (static) register containing a 16-bit EEVideo identifier and a 16-bit capabilities bitmap.

000102030405060708090a0b0c0d0e0f101112131415161718191a1b1c1d1e1fID=0xE71Dc0c1c2c3c4c5c6c7c8c9cAcBcCcDcEcF
Register 0
Register 0 Fields
Field Description

ID

Common identifier for EEVideo Devices. May be used to validate bit and byte endian.

c0

1 = Feature Declaration List Available

c1

(reserved)

c2

(reserved)

c3

(reserved)

c4

1 = Multiple Binary Address Options supported

c5

1 = String Type Read available

c6

1 = FIFO Read Type available

c7

1 = Read & Reset Type available

c8

1 = Masked Write available

c9

1 = Bit Toggle Write available

cA

1 = Bit Set Write available

cB

1 = Bit Clear Write available

cC

1 = Static IP configuration supported

cD

1 = Link-Local Address supported

cE

1 = DHCP supported

cF

1 = Multicast CoAP discovery supported

The ID field (0xE71D) is stored in network byte order (big-endian). A host may read Register 0 as a single 32-bit word and check that the high 16 bits equal 0xE71D to confirm both byte order and that the device is EEVideo-compliant.

Registers 0x04, 0x08, 0x0C (Reserved)

These three registers are reserved for future static read-only values.

Feature Declaration List (0x10–)

The Feature Declaration List declares every supported feature and the register addresses used by that feature.

If a device implements it, the list must start at register 0x10.

Hosts read this list to build a complete register map. The list ends with the End of Features marker (defined in the Features section).

The format of these declarations is described below.

Additional Static Registers

Individual features may define additional static registers. Their addresses are specified by pointers in the Feature Declaration List.

Dynamic Registers

Dynamic registers begin after the last static register. For clarity, implementations should align the first dynamic register to subsequent power-of-two boundary.

This convention lets a host determine whether a register is static (constant) or dynamic (may change) simply by inspecting the upper address bits.

Typically, the dynamic registers may not be actual memory locations, but rather represent specific function calls.

If there are regions of writable registers that represent physical memory locations, it may be helpful to group them together in address blocks. Detailing these blocks is outside the scope of this specification.

Feature Discovery

EEVideo defines a set of standardized optional features. A device only implements the features it needs; no resources are wasted on unused features.

Multiple instances of a given feature may be declared separately.

Each feature is listed contiguously in the Feature Declaration List beginning at register 0x10. Features may be listed in any order, but the End of Features marker must be last.

The only required declaration (if the list is present) is the End of Features marker.

000102030405060708090a0b0c0d0e0f101112131415161718191a1b1c1d1e1fFeature IdFeature VersionPointer Count0020Pointer 0 (if Pointer Count > 0)40Additional Pointers (if Pointer Count > 1)60i+00
Feature Declaration Format

Each feature in the list follows this format.

Feature Declaration Fields
Field Bits Description

Feature ID

12

Feature identification number (see Features)

Feature Version

12

Version of the implemented feature

Pointer Count

8

Number of register pointers (0-255)

Pointer 0

32

Address of the first register for this feature

Pointer 1-n

32

Additional register addresses (if required)

The number of 32-bit registers occupied by each feature declaration is Pointer Count + 1.

Parsing rule: The list must be parsed by reading each declaration’s length (based on Pointer Count). Simply scanning for the End of Features marker can give incorrect results.

Declared features are not required to implement every register listed in the feature specification. The Pointer Count indicates exactly how many registers are provided. Pointers to unimplemented registers must point to 0x00000000. A host seeing a pointer of 0x0 must treat that register as not implemented.

Pointers appear in the exact order defined in the feature specification (required registers first, optional registers last). A single pointer may refer to the start of a block of related registers.